To clear bit errors that occur due to loose connection of the PGND cable, reconnect the PGND cable.
In the transmission network, five sites form an MSP ring. The five sites are names as Site 1, Site 2,
Site 3, Site 4, and Site 5 in the counter-clockwise direction. Site 1 is the gateway NE. Only 2 Mbit/s
services are activated between Site 1 and other sites. The clock source of Site 1 is the external clock
source, and the other sites trace the west line clock source. Query the alarms and performance
events. It is found that a large number of bit errors exist in the lower order path at Site 1, Site 2,
and Site 3. At the same time, bit errors also exist in the lower order path at Site 4 and Site 5.
- If bit errors exist in the lower order path at each site, the possible causes are as follows:
Site 1 has services with all the other sites. Hence, the fault may exist at Site 1. There is
little probability that all the PQ1 boards at Site 1 are faulty. Then, it is suspected that
the line board SL16 is faulty. The fan may be faulty. In this case, bit errors occur in the
higher order path, which results in bit errors in the lower order path.
- The 2M cables and fibers may be faulty or the cable connection may be faulty at Site 1.
1. Query the history performance data. Reset the performance, then query the current
performance. It is found that bit errors persist.
2. Check the line boards at each site. It is found that there is no bit error in the higher order path.