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TNV1EC116
Huawei OSN 9800 U64/U32/16 16-port channelized STM-1 Packet Service Processing Board
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Hardware Compatibility
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Hardware Tested
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Description
TNV1EC116, 16*STM-1 CES Interface Board
Applied to OSN 9800 U64/U32/U16 standard subrack
Support only one variant of S01, that is TNV1EC116S01
TNV1EC116 are applicable to the time division multiplexing (TDM) pseudo wire emulation edge-to-edge (PWE3) scenario. In this scenario, the PWE3 mechanism is used to simulate TDM services and connect the traditional TDM network to the packet switched network (PSN). It provides sixteen channelized STM-1 interfaces and supports CES/CEP services, another board EC404 which provides four channelized STM-4 interfaces and supports CES/CEP services.
Tech Specs
| Front Panel | |||
 |
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| Initial version of different subrack:V100R001C30SPC200 | |||
| Valid Slot | |||
| U64: IU1 to IU64 U32: IU1 to IU32 U16: IU1 to IU14 |
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| Function | Description | ||
| Basic function | Processing capability | Line-rate | |
| Interface function | Automatic laser shutdown | Supported | |
| Automatic loopback release on interfaces | Supported | ||
| PRBSa | Supports PRBS tests in framed or unframed mode for VC12 and VC4 channels in both the transmit and receive directions. | ||
| Traffic buffer time | 50 ms | ||
| CES/CEP | Supported service emulation modes | CEP CES: CESoPSN, SAToP |
|
| Supports timeslot compression. In the case of CES services in CESoPSN mode, the board compresses 1 to 31 idle timeslots to conserve NNI-side bandwidth. | |||
| Supported clock mode | Retiming mode | ||
| The jitter buffer time of the CES service can be set to a value ranging from 0.375 ms to 64 ms with steps of 0.125 ms. | |||
| The jitter buffer time of the CEP service can be set to a value ranging from 0.125 ms to 16 ms with steps of 0.125 ms. | |||
| The packet loading time can be set to a value ranging from 0.25 ms to 3 ms with steps of 0.125 ms. | |||
| Transparent transmission of SDH section overheads | Supported in CEP mode but not in CES mode. | ||
| Transparent transmission of higher order POH | Supported | ||
| Protection | Supports LMSP/MC-LMSP. | ||
| a: The PRBS test function and the port loopback function cannot be both enabled simultaneously. | |||
| Mechanical Specifications | |||
| Dimensions (HxWxD,mm) | 477.30×30.50×220.00 | ||
| Weight (kg) | 2.85 | ||
| Typical Power Consumption | 109 | ||
| Maximum Power Consumption | 120 | ||
Additional information
| Port |
12-24 |
|---|---|
| Features |
Q & A
Q: What are the differences of EC116/EC404?
A:
1, Functions and Features
| Function and Feature | Supported service | Port working mode |
| EC116 | Sixteen channelized STM-1 interfaces | STM-1 interface inloop STM-1 interface outloop VC12 channel inloop VC12 channel outloop VC4 channel inloop VC4 channel outloop |
| EC404 | Four channelized STM-4 interfaces | STM-4 interface inloop STM-4 interface outloop VC12 channel inloop VC12 channel outloop VC4 channel inloop VC4 channel outloop |
2, Variant
| Board | Variant |
| TNV1EC116 | S01 |
| TNV1EC404 | S01 |
3, Mapping Between the Board and OptiX OSN 9800 U64/U32/U16
| Board | Initial Version | 9800 U64 Standard Subrack | 9800 U32 Standard Subrack | 9800 U16 Subrack |
| TNV1EC116 | V100R001C30SPC200 | Supported | Supported | Supported |
| TNV1EC404 | V100R001C30SPC200 | Supported | Supported | Supported |
4, Power Consumption, Weight, and Valid Slots
| Board | Typical Power Consumption (W) | Maximum Power Consumption (W) | Weight (kg) | Number of Occupied Slots | Valid Slots |
| EC116 | 109 | 120 | 2.85 | 1 | U64: IU1 to IU64 |
| EC404 | 98 | 108 | 2.67 | 1 | U64: IU1 to IU64 |
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